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Posted on LinkedIn: Want to offer your students hands-on labs in your integrated-circuits courses connecting measurement, simulation, and analysis? We created the MOSbius chip for that purpose! Documentation and example experiments are available at https://mosbius.org. The 68-pin MOSbius chip contains nMOS and pMOS devices as individual transistors, and in typical configurations like current mirrors, differential pairs, common-source configuration, simple operational transconductance amplifiers or inverters. Circuits can be built with external wires and there is also a 65x10 on-chip digitally controlled switch matrix than can connect each of the 63 transistor-terminal pins and the VDD and VSS to 10 buses on the chip to build circuits. ...

Posted on LinkedIn: Chips are working! Well-deserved kudos to the “VLSI Design Lab” (t/o course) students who measured their chips and demonstrated them in an application. Take a look at their websites and videos. We had another successful VLSI Design Lab offering at Columbia in 2024. Students designed custom chips from scratch in spring, taped them out to a commercial foundry in summer, tested them, and demonstrated them in fall in an application with their custom PCB: three PPG chips: a PPG with SpO2 measurement, a PPG with heart-rate and breathing-rate measurement, and a low-power PPG with lock-in amplification; an ECG chip including a 10-bit SAR ADC; an AM radio with upconversion to a 10.7MHz IF; a light-powered potentiostat; an ultra-low-power R-C sensor readout; an NPU accelerator for CNNs; and last but not least, a full RISC-V processor. ...

Posted on LinkedIn: We taped-out our 2024 VLSI Design Lab class projects!! Three PPG chips, an ECG chip, an AM radio, a potentiostat, a sensor readout, a radar baseband, an NPU and last but not least, a RISC-V processor have been sent out for fabrication. Congratulations to all teams for completing their tape-out and many thanks to the teaching assistants Berk ADIM, Mor Shimshi, Alfred Festus Davidson and Zhipeng Fan for all their help and tireless mentorship. Many thanks to Mingoo Seok for co-supervising the RISC-V design. ...

Posted on LinkedIn: Hot of the press in the SSCS Magazine Summer 2023: “Teaching IC Design: From Concepts to Testing a Fabricated Custom Chip” Sharing my experience with teaching a design lab class where students conceive, design, lay-out, send out for fabrication, and then test their own chip. If you have any questions, don’t hesitate to contact me. Full article: – make sure to read the acknowledgments, none of this would have been possible without the help of many others. ...

Posted on LinkedIn: Happy to share a video Columbia Engineering made about the demo session for the VLSI Design Lab where students design a chip, get it fabricated, and demonstrate it. Proud of the hard work and dedication of the students and the TAs!! Many thanks to our 2022 sponsor Apple. Take a look at the course website for more details. LinkedIn Post