Posted on LinkedIn: We taped-out our 2024 VLSI Design Lab class projects!! Three PPG chips, an ECG chip, an AM radio, a potentiostat, a sensor readout, a radar baseband, an NPU and last but not least, a RISC-V processor have been sent out for fabrication.
Congratulations to all teams for completing their tape-out and many thanks to the teaching assistants Berk ADIM, Mor Shimshi, Alfred Festus Davidson and Zhipeng Fan for all their help and tireless mentorship. Many thanks to Mingoo Seok for co-supervising the RISC-V design.
Many thanks to our sponsor Apple and Joao Cerqueira our liaison.
For more information on the class, review the course page, take a look at this article or watch this video.
Stay tuned for measurement updates in the fall.